AK25_Manual.pdf part of Funai 11AK25 TV AK25.rar, Schema Elettrico text manual preview

Text preview for : AK25_Manual.pdf part of Funai 11AK25 Schema Elettrico

Back to : TV AK25.rar | Home

Contents ................................................................................................................................................................................... 1 Safety Precautions ................................................................................................................................................................... 2 TV Set switched off .................................................................................................................................................................. 2 Measurements .......................................................................................................................................................................... 2 PERI-TV SOCKET ................................................................................................................................................................... 2 SCART 1 ................................................................................................................................................................................... 2 SCART 2 ................................................................................................................................................................................... 2 INTRODUCTION ...................................................................................................................................................................... 2 SMALL SIGNAL PART WITH TDA884X .................................................................................................................................. 2-3 TUNER ...................................................................................................................................................................................... 4 VIDEO SWITCH TEA6415C .................................................................................................................................................... 4 SOUND OUTPUT STAGE TDA2614/TDA2615/TDA2616Q ....................................................................................................... 5 VERTICAL OUTPUT STAGE WITH TDA8351/TDA8356 ........................................................................................................... 5 VIDEO OUTPUT AMPLIFIER TDA6107Q .................................................................................................................................... 5 POWER SUPPLY (SMPS) .......................................................................................................................................................... 5 MICROCONTROLLER SDA545X OTP ....................................................................................................................................... 5 SERIAL ACCESS CMOS 8K (1024*8) EEPROM ST24C08 ................................................................................................... 6 CLASS AB STEREO HEADPHONE DRIVER TDA1308 ............................................................................................................. 6 SAW FILTERS ........................................................................................................................................................................... 6 IC DESCRIPTIONS AND INTERNAL BLOCK DIAGRAM ............................................................................................................. 7 TDA8840/TDA8842/TDA8844 ............................................................................................................................................ 6-7 PLL ..................................................................................................................................................................................... 8 TEA6415C .......................................................................................................................................................................... 8 TDA2614/TDA2615 ............................................................................................................................................................ 9 TDA6107Q .......................................................................................................................................................................... 10 MC44604 ............................................................................................................................................................................ 10 SDA545X ............................................................................................................................................................................ 11 ST24C08 ............................................................................................................................................................................. 12 TDA1308 ............................................................................................................................................................................ 13 G1965M .............................................................................................................................................................................. 13 AK25 CHASSIS MANUAL ADJUSTMENT PROCEDURE ........................................................................................................... 13 For Option Settings ............................................................................................................................................................................ 1 3 OPTION 00 ........................................................................................................................................................................................ 1 4 OPTION 01 ........................................................................................................................................................................................ 1 4 OPTION 02 ........................................................................................................................................................................................ 1 4 OPTION 03 ........................................................................................................................................................................................ 1 4 OPTION 04 ........................................................................................................................................................................................ 1 4 OPTION 05 ........................................................................................................................................................................................ 1 4 OPTION 06 ........................................................................................................................................................................................ 1 4 OPTION 07 ........................................................................................................................................................................................ 14-15 OPTION 08 ........................................................................................................................................................................................ 1 5 OPTION 09 ........................................................................................................................................................................................ 1 6 OPTION 10 ........................................................................................................................................................................................ 1 6 OPTION 11 ........................................................................................................................................................................................ 1 6 OPTION 12 ........................................................................................................................................................................................ 16-17 OPTION 13 ........................................................................................................................................................................................ 1 7 OPTION 14 ........................................................................................................................................................................................ 1 7 OPTION 15 ........................................................................................................................................................................................ 1 7 OPTION 16 ........................................................................................................................................................................................ 1 8 OPTION 17 ........................................................................................................................................................................................ 1 8 OPTION 18 ........................................................................................................................................................................................ 1 8 OPTION 19 ........................................................................................................................................................................................ 1 8 OPTION 20 ........................................................................................................................................................................................ 1 9 OPTION 21 ........................................................................................................................................................................................ 1 9 OPTION 22 ........................................................................................................................................................................................ 1 9 OPTION 23 ........................................................................................................................................................................................ 1 9 OPTION 24 ........................................................................................................................................................................................ 1 9 OPTION 25 ........................................................................................................................................................................................ 2 0 OPTION 26 ........................................................................................................................................................................................ 2 0 OPTION 27 ........................................................................................................................................................................................ 2 0 OPTION 28 ........................................................................................................................................................................................ 2 0 OPTION 29 ........................................................................................................................................................................................ 2 0 OPTION 30 ........................................................................................................................................................................................ 2 1 AK25 CHASSIS ADJUST SETTING ADJUST 00-24 ................................................................................................................................................................................... 2 1 AK25 TECHNICAL FEATURES AND DIFFERENCES ...................................................................................................................... 2 2 GENERAL BLOCK DIAGRAM OF CHASSIS AK25 ............................................................................................................................ 2 3

CONTENTS

1

DO NOT CHANGE ANY MODULE UNLESS THE SET IS SWITCH OFF The mains supply side of the switch mode power supply transformer is live. Use an isolating transformer. The receivers fulfill completely the safety requirements. Safety precautions: Servicing of this TV should only be carried out by a qualified person. - Components marked with the warning symbol on the circuit diagram are critical for safety and must only be replaced with an identical component. - Power resistor and fusable resistors must be mounted in an identical manner to the original component. - When servicing this TV, check that the EHT does not exceed 28kV. TV Set switched off: Make short-circuit between HV-CRT clip and CRT ground layer. Short C804 (150mF) before changing IC802 or other components in primary side of SMPS. Measurements: Voltage readings and oscilloscope traces are measured under following conditions. Antenna signal 60dB from colourbar generator. (100% white, 75% colour saturation) Brightness, contrast, colour set for a normal picture. Mains supply, 220VAC, 50Hz.

PERI-TV SOCKET

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

Audio right output Audio right input Audio left output Ground AF Ground Blue Audio left input Blue input AV switching input Ground Green Green input Ground Red Ground Blanking Red input Blanking input Ground CVS output Ground CVS input CVS output CVS input Ground

SCART 1 (SC050)

0.5Vrms / 1K 0.5Vrms / 10K 0.5Vrms / 1K 0.5Vrms / 10K 0.7Vpp / 75ohm 0-12VDC /10K

0.7Vpp / 75ohm

0.7Vpp / 75ohm 0-0.4VDC, 1-3VDC / 75ohm 1Vpp / 75ohm 1Vpp / 75ohm

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

Audio right output Audio right input Audio left output Ground AF Ground Blue Audio left input Blue input AV switching input Ground Green Ground Red Ground Blanking Ground CVS output Ground CVS input CVS output CVS input Ground

SCART 2 (SC051)

0.5Vrms / 1K 0.5Vrms / 10K 0.5Vrms / 1K 0.5Vrms / 10K 0.7Vpp / 75ohm 0-12VDC /10K

1Vpp / 75ohm 1Vpp / 75ohm

1. INTRODUCTION 11AK25 is a 90ų chassis capable of driving 14-20-21 tubes at appropriate currents. The chassis is capable of working in both PAL and SECAM. The sound system is capable of giving 6watts RMS output into a load of 8ohms. One 8 page simple TELETEXT, TOPTEXT and FASTEXT is provided. The chassis is equipped with 21-pin scart connectors which can accept via scart the SVHS format from VCRs so equipped. . SMALL SIGNAL PART WITH TDA884X The TDA8840/8842 combine all small signal functions required for a colour TV receiver, except tuning. 2.1. Vision IF amplifier The IF-amplifier contains 3 AC-coupled control stages with a total gain control range which is higher than 66dB. The sensitivity of the circuit is comparable with that of modern IF-IC s. The video signal is demodulated by means of a PLL carrier regenerator. This circuit contains a frequency detector and a phase detector. The AFC output is obtained by using the VCO control voltage of the PLL and can be read via the I²C-bus. For fast search tuning systems the window of the AFC can be increased with a factor 3. The setting is realised with the AFW bit. Depending on the type the AGC-detector operates on top-sync level (single standard versions) or on top sync and top white-level (multi standard versions). The demodulation polarity is switched via the I²C-bus. The AGC detector time-constant capacitor is connected externally. This mainly because of the flexibility of the application. The time-constant of the AGC system during positive modulation is rather long to avoid visible variations of the signal amplitude. To improve the speed of the AGC system a circuit has 2

been included which detects whether the AGC detector is activated every frame period. When during 3 frame periods no action is detected the speed of the system is increased. For signals without peak white information the system switches automatically to a gated black level AGC. Because a black level clamp pulse is required for this way of operation the circuit will only switch to black level AGC in the internal mode. The circuits contain a video identification circuit which is independent of the synchronisation circuit. Therefore search tuning is possible when the display section of the receiver is used as a monitor. The ident output is supplied to the tuning system via the I²C-bus. The video ident circuit can be made less sensitive by means of the STM bit. This mode can be used during search tuning to avoid that the tuning system will stop at very weak input signals. 2.2. Video Switches The circuits have two CVBS inputs (internal and external CVBS) and Y/C input. When the Y/C input is not required the Y input can be used as third CVBS input. The selection of the various sources is made via the I²C-bus. The circuit has one CVBS output. 2.3. Sound Circuit The sound band pass and trap filters have to be connected externally. The filtered intercarrier signal is fed to a limiter circuit and is demodulated by means of a PLL demodulator. This PLL circuit tunes itself automatically to the incoming carrier signal so that no adjustment is required. The volume is controlled via the I²C-bus. The deemphasis capacitor has to be connected externally. The non-controlled audio signal can be obtained from this pin. The FM demodulator can be muted via the I²C-bus. This function can be used to switch-off the sound during a channel change so that high output peaks are prevented. The TDA8840/8842 contain an automatic volume levelling (AVL) circuit which automatically stabilises the audio output signal to a certain level which can be set by the viewer by means of the volume control. This function prevents big audio output fluctuations due to variations of the modulation depth of the transmitter. The AVL function can be activated via the I²C-bus. 2.4. Synchronisation circuit The sync seperator is preceded by a controlled amplifier which adjusts the sync pulse amplitude to a fixed level. These pulses are fed to the slicing stage which is operating at 50% of the amplitude. The separated sync pulses are fed to the first phase detector and to the coincidence detector. This coincidence detector is used to detect whether the line oscillator is synchronised and can also be used for transmitter identification. The first PLL has a very high statical steepness so that the phase of the picture is independent of the line frequency. The horizontal output signal is generated by means of an oscillator which is running at twice the line frequency. Its frequency is divided by 2 to lock the first control loop to the incoming signal. The time-constant of the loop can be forced by the I²C-bus (fast or slow). If required the IC can select the time-constant depending on the noise content of the incoming video signal. To protect the horizontal output transistor, the horizontal drive is immediately switched off when a power-on-reset is detected. The drive signal is switched-on again when the normal switch-on procedure is followed. Via the I²C-bus, adjustments can be made of the horizontal and vertical geometry. The vertical sawtooth generator drives the vertical output drive circuit which has a differrential output current. For the EW drive a single ended current output is available. When the horizontal scan is reduced to display 4 : 3 pictures on a 16 : 9 picture tube an accurate video blanking can be switched on to obtain well defined edges on the screen. Overvoltage conditions can be detected via the EHT tracking pin.When an overvoltage condition is detected the horizontal output drive signal will be switched-off via the slow stop procedure but it is also possible that the drive is not switched-off and that just a protection indication is given in the I²C-bus output byte. The choice is made via the input bit PRD. 2.5. Chroma and Luminance processing The circuits contain a chroma bandpass and trap circuit. The filters are realised by means of gyrator circuits and they are automatically calibrated by comparing the tuning frequency with the X-tal frequency of the decoder. The luminance delay line and the delay for the peaking circuit are also realised by means of gyrator circuits. The centre frequency of the chroma bandpass filter is switchable via the I²C-bus so that the performance can be optimised for front-end signals and external CVBS signals. During SECAM reception the centre frequency of the chroma trap is reduced to get a better suppression of the SECAM carrier frequencies. 2.6. Colour Decoder The decoder contains an alignment-free X-tal oscillator, a killer circuit and two colour difference demodulators. The 90° phase shift for the reference signal is made internally. The IC contains an automatic colour limiting (ACL) circuit which prevents that oversaturation occurs when signals with a high chroma-to-burst ratio are received. The ACL circuit is designed such that it only reduces the chroma signal and not the burst signal. This has the advantage that the colour sensitivity is not affected by this function. The base-band delay line is integrated in the PAL/SECAM IC s. The demodulated colour difference signals are internally supplied to the delay line. The matrixed signals are externally available. The colour difference matrix switches automatically between PAL/SECAM and NTSC, however, it is also possible to fix the matrix in the PAL standard. Which colour standard the IC can decode depends on the external X-tals. The X-tal to be connected to pin 34 must have a frequency of 3.5 MHz (NTSC-M, PAL-M or PAL-N) and pin 35 can handle X-tals with a frequency of 4.4 and 3.5 MHz. To prevent calibration problems of the horizontal oscillator the external switching between the 2 X-tals should be carried out when the oscillator is forced to pin 35. For a reliable calibration of the horizontal oscillator it is very important that the X-tal indication bits (XA and XB) are not corrupted. For this reason the X-tal bits can be read in the output bytes so that the software can check the I²C-bus transmission. 2.7. RGB output circuit and black-current stabilisation The colour-difference signals are matrixed with the luminance signal to obtain the RGB-signals. The TDA 884X device has one linear RGB input. This RGB signal can be controlled on contrast and brightness. The output signal has an amplitude of about 2 volts black-to-white at nominal input signals and nominal settings of the controls. To increase the flexibility of the IC it is possible to insert OSD and/or teletext signals directly at the RGB outputs. This insertion mode is controlled via the insertion input (pin 26 in the S-DIP 56- and pin 38 in the QFP-64 level). This blanking action at the RGB outputs has some delay which must be compansated externally. To obtain an accurate biasing of the picture tube a Continuous Cathode Calibration circuit has been developed. This function is realised by means of a 2-point black level stabilisation circuit. When the TV receiver is switched-on, the RGB output signals are blanked and the black current loop will try to set the right picture tube bias levels.Via the AST bit a choice can be made between automatic start-up or a start-up via the m-processor. 3

3. TUNER Either a PLL tuner is used as a tuner. Channel coverage of PLL: BAND OFF-AIR CHANNELS CHANNELS RANGE (MHz) E2 to C E5 to E12 E21 to E69 FREQUENCY 48.25 to 82.25 (1) 175.25 to 224.25 471.25 to 855.25 (2) CABLE CHANNELS CHANNELS S01 to S08 S09 to S38 S39 to S41 FREQUENCY RANGE (MHz) 69.25 to 154.25 161.25 to 439.25 447.25 to 463.25

Low Band Mid Band High Band

(1). Enough margin is available to tune down to 45.25 MHz. (2). Enough margin is available to tune up to 863.25 MHz.

Noise

Typical Low band : 5dB Mid band : 5dB High band : 6dB

Max. 9dB 9dB 9dB

Min. All channels : 38dB Gain Taper (of-air channels) : -

Gain

Typical 44dB -

Max. 52dB 8dB

4.VIDEO SWITCH TEA6415C In case of three or more external sources are used, the video switch IC TEA6415C is used. The main function of this device is to switch 8 video input sources on the 6 outputs. Each output can be switched on only one of each input. On each input an alignment of the lowest level of the signal is made (bottom of sync. top for CVBS or black level for RGB signals). Each nominal gain between any input and output is 6.5dB.For D2MAC or Chroma signal the alignment is switched off by forcing, with an external resistor bridge, 5VDC on the input. Each input can be used as a normal input or as a MAC or Chroma input (with external resistor bridge). All the switching possibilities are changed through the BUS. Driving 75ohm load needs an external resistor. It is possible to have the same input connected to several outputs. Sound IF Input: The sound IF amplifier consists of three AC-coupled differential amplifier stages each with approximately 20dB gain. At the output of each stage is a multiplier for gain controlling. The overall control range is approximately -6 to +60dB and the frequency response (-3dB) of the IF amplifier is approximately 6 to 70MHz. The steepness of gain control is approximately 10mV/dB. IF AGC: The automatic gain control voltage to maintain the AM demodulator output signal at a constant level is generated by a mean level detector.The AGC-detector charges and discharges the capacitor at pin 3 controlled by the output signal of the AM-demodulator compared to an internal reference voltage.The maximum charge/discharge current is approximately 5 mA. AM-demodulator The IF amplifier output signal is fed to a limiting amplifier (two stages) and to a multiplier circuit. However the limiter output signal (which is not any more AM modulated) is also fed to the multiplier, which provides AM demodulation (in phase demodulation). After lowpass filtering (fg @ 400kHz) for carrier rejection and buffering, the demodulator output signal is present at pin 6. Audio Switch This circuit is an operational amplifier with three input stages and internal feedback network determining gain (0dB) and frequency response (fg @ 700kHz). Two of the input stages are connected to pin 7 and pin 9, the third input stage to an internal reference voltage. Controlled by the switching pins 10 and 12, one of the three input stages can be activated and a choice made between two different AF signals or mute state. The selected signal is present at pin 8. The decoupling capacitors at the input pins are needed, because the internally generated bias voltage for the input stages must not be influenced by the application in order to avoid DC-plop in case of switching. Reference Circuit: This circuit is a band gap stabiliser in combination with a voltage regulation amplifier, which provides an internal reference voltage of about 3.6V nearly independent from supply voltage and temperature. This reference voltage is filtered by the capacitor at pin 4 in order to reduce noise. It is used as a reference to generate all important voltages and currents of the circuit. For application in 12V power supply concepts, there is an internal voltage divider in combination with a Darlington transistor in order to reduce the supply voltage for all IC function blocks to approximately 6V. Description of the demodulator and decoder section: SIF Input: Two input pins are provided, SIF1 e.g. for terrestrial TV and SIF2 e.g. for a satellite tuner. The selected signal is passed through an AGC circuit and then digitized by an 8-bit ADC operating at 24.576MHz. AGC: The gain of the AGC amplifier is controlled from the ADC output by means of a digital control loop employing hysteresis. The AGC has a fast attack behaviour to prevent ADC overloads and slow decay behaviour AGC oscillations. For AM demodulation AGC must be switched off. Mixer The digitized input signal is fed to the mixers, which mix one or both input sound carriers down to zero IF. A 24-bit control word for each carrier sets the required frequency.

4

FM and AM Demodulation An FM or AM input signal is fed via a band-limiting filter to a demodulator that can be used for either FM or AM demodulation. Apart from the standard (fixed) de-emphasis characteristic, an adaptive de-emphasis is available for encoded satellite programs. A stereo decoder recovers the left and right signal channels from the demodulated sound carriers. FM Identification: The identification of the FM sound mode is performed by AM synchronous demodulation of the pilot signal and narrow-band detection of the identification frequencies. The result is available via the I²C-bus interface. NICAM Demodulation: The NICAM signal is transmitted in a DQPSK code at a bit rate of 728 kbit/s. The NICAM demodulator performs DQPSK demodulation and feeds the resulting bitstream and clock signal onto the NICAM decoder and, for evaluation purposes, to PCLK (pin 1) and NICAM (pin 2). NICAM Decoder: The device performs all decoding functions in accordance with the EBU NICAM 728 specification. After locking to the frame alignment word, the data is descrambled by applying the defined pseudo-random binary sequence; the device will then synchronise to the periodic frame flag bit C0. The status of the NICAM decoder can be read out from the NICAM status register by the user. The OSB bit indicates that the decoder has locked to the NICAM data. The VDSP bit indicates that the decoder has locked to the NICAM data and that the data is valid sound data. 5. SOUND OUTPUT STAGE TDA2614/TDA2615 TDA2614 is used as the AF output amplifier for mono applications. It is supplied by ±12VDC coming from a separate winding in the SMPS transformer. An output power of 2*6W (THD=0.5%) can be delivered into an 8ohm load. TDA2615 is used as the AF output amplifier for stereo applications. It is supplied by ±12VDC coming from a separate winding in the SMPS transformer. An output power of 2*6W (THD=0.5%) can be delivered into an 8ohm load. 6. VERTICAL OUTPUT STAGE WITH TDA8356 The TDA8356 vertical deflection circuit can be used in 90° deflection systems with field frequencies from 50 up to 120Hz. With its bridge configuration the deflection output can be DC coupled with few external components. Only a single supply voltage for the scan and a second supply for the flyback are needed. The drive voltage is amplified by an amplifier and fed to two amplifiers, one is inverting and the other is a non inverting amplifier. The outputs (pins 7 and 4) are connected to the series connection of the vertical deflection coil and feedback resistor Rsense (R702//R703). The voltage across Rsense is fed via pin 9 to correction amplifier, to obtain a deflection current which is proportional to the drive voltage. The supply voltage for the TDA8356 is 15VDC at pin 3. The supply voltage generator has a separate supply voltage of 45VDC at pin 6. 7. VIDEO OUTPUT AMPLIFIER TDA6107Q The TDA6107Q consists of three monolithic video output amplifiers. The amplifier can be seen as an operational amplifier with negative feedback. The advantage of negative feedback is that the amplifier characteristics do not play an important role up to certain frequencies. The internal flash diodes protect the amplifiers against flash over in the picture tube. The only protections required at the cathode outputs are a flash resistor and a sparkgap. The TDA6107Q has an internal thermal protection circuit which gives a decrease of the slew rate at high temperatures. Furthermore, the device needs only one power supply voltage (Vdd). In contrast to previous types of DMOS video amplifiers, all the external resistors (Rf, Ri and Ra) are integrated, so the gain is fixed and saves 9 resistors. Furthermore, the reference voltage is integrated, it saves a resistor divider and a decoupling capacitor. So, the replacement value of the TDA6107Q is very high. The TDA6107Q is provided with a black current data pin. Since TDA884X is used as drive device, no adjustments are required for gain and black setting, as the TDA884X has I²C white point adjustment and black current set-up. 8. POWER SUPPLY (SMPS) The DC voltages required at various parts of the chassis are provided by an SMPS transformer controlled by the IC MC44604 which is designed for driving, controlling and protecting switching transistor of SMPS. The transformer produces 150/115V for FBT input, ±14V for audio output IC, S+5V for microcontroller, +15V for vertical output (field scan) and +33V for tuner and some other ICs and transistors. 9. MICROCONTROLLER SDA545XOTP The device is TV TEXT tuning and control system based on the SDA 525X TV TEXT microcontroller. It is designed for a low cost mono TV-SET with analogue picture and sound control. Neverthless the system offers an on screen display (OSD) and IR remote control of all functions. SDA545X has the following features: - Display of program number, channel number, TV standard, analogue values, sleep timer, parental control, and mute is done by OSD. - Single LED for IR active, standby and on mode indication. - 1 Control line to select external source. - 3 Control lines for TV standard selection. - Frequency synthesis tuning (62.5 kHz steps) - 192 step fine tuning - Channels corresponding to standards B/G, OIRT, L and I (I+) - Mono sound control by analogue voltage - System configuration with service mode 5

10. SERIAL ACCESS CMOS 8K (1024*8) EEPROM ST24C08 The ST24C08 is a 8Kbit electrically erasable programmable memory (EEPROM), organised as 4 blocks of 256*8 bits. The memory is compatible with the I²C standard, two wire serial interface which uses a bi-directional data bus and serial clock. The memory carries a built-in 4 bit, unique device identification code (1010) corresponding to the I²C bus definition. This is used together with 1 chip enable input (E) so that up to 2*8K devices may be attached to the I²C bus and selected individually. 11. CLASS AB STEREO HEADPHONE DRIVER TDA1308 The TDA1308 is an integrated class AB stereo headphone driver contained in a DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital audio applications. 16. SAW FILTERS Saw filter type : G1965M : G3962M : G1984 : J1951M : J3950M : J1956M : K2955M : K2958M : K2962M : G3957M : K6256K : K6259K M1963M Model: PAL-SECAM B/G MONO PAL-SECAM B/G GER&NIC STEREO, PAL I NIC STEREO, INT-1 PAL-SECAM B/G GER&NIC STEREO INT-2 PAL-I MONO PAL-I NIC STEREO PAL-I MONO PAL-SECAM B/G-D/K MONO, PAL-SECAM B/G-D/K-I, MONO, PAL-SECAM B/G-D/K-L MONO PAL-SECAM B/G-D/K (38) MONO PAL-SECAM B/G-L/L MONO PAL-SECAM B/G-L/L GER&NIC BG/L STEREO PAL-SECAM B/G-D/K-I-L/L MONO, PAL-SECAM B/G-D/K-I, L/L GER&NIC BG/L STEREO, PAL-SECAM B/G-D/K-I-L/L I, NICAM STEREO, PAL-SECAM B/G-D/K-I-L/L GER&NIC I-B/G-L, STEREO : PAL-SECAM B/G-D/K-I-M/N (EURO) MONO : PAL M/N MONO, NTSC M MONO, PAL M/N-NTSC M MONO

IC DESCRIPTIONS AND INTERNAL BLOCK DIAGRAM n TDA8840/8842 n TUNER n TEA6415C n TDA2614/2615 n TDA8356 n TDA6107Q n MC44604 n SDA545X n ST24C08 n TDA1308

TDA8840/8842

The TDA884X is IżC-bus controlled single chip TV processor which is intended to be applied in PAL, NTSC, PAL/NTSC and multi-standard television receivers. These IC s are nearly pin compatible with the TDA837X TV processors but have a higher degree of integration because the delay line (TDA4665 function) and the SECAM decoder have been integrated. In addition to these functions some additional features have been added like Continuous Cathode Calibration (2-point black current loop which results in an accurate biasing of the 3 guns), adjustable luminance delay time, blue stretching and dynamic skin tone control. Features: n Vision IF circuit with PLL demodulator n Alignment-free multi-standard FM sound demodulator (4.5 MHz to 6.5 MHz) n Audio switch n Flexible source selection with CVBS switch and Y(CVBS)/C input so that a comb filter can be applied n Integrated chrominance trap circuit n Integrated luminance delay line n Asymmetrical peaking in the luminance channel with a noise coring function n Black stretching of non-standard CVBS or luminance signals n Integrated chroma band-pass filter with switchable center frequency n Blue stretch circuit which offsets colours near white towards blue n RGB control circuit with Continuous Cathode Calibration and white point adjustment n Linear RGB inputs and fast blanking n Possibility to insert a blue black option when no video signal is available n Horizontal synchronisation with two control loops and alignment-free horizontal oscillator n Vertical count-down circuit n Vertical driver optimised for DC-coupled vertical output stages n IżC-bus control of various functions n Low dissipation (850 mW) Functional Differences between the 8840/8842 :

6

IC VERSION (TDA) Multi-standard IF Automatic Volume Limiting PAL Decoder SECAM Decoder NTSC Decoder Dynamic Skin Control Colour Matrix PAL/NTSC (Japan) Colour Matrix NTSC Japan/USA YUV interface Base-band delay line Adjustable luminance delay time Horizontal geometry Horizontal and vertical zoom Vertical scroll PINNING 1. Sound IF input 2. External audio input 3. IF demodulator tuned circuit 1 4. IF demodulator tuned circuit 2 5. IF-PLL loop filter 6. IF video output 7. Serial clock input 8. Serial data input/output 9. Bandgap decoupling 10. Chrominance input (S-VHS) 11. External CVBS/Y input 12. Main supply voltage 1 13. Internal CVBS input 14. Ground 1 15. Audio output 16. SECAM PLL decoupling 17. External CVBS input 18. Black-current input

8840 X X

8842 X X X X X X

X

X

PIN VALUE : 1mVrms : 500mVrms : : : : : : : : Min:32-Max:60 MHz 4.7V (Negative Modulation), 2V (Positive Modulation) Low level max:1.5 V, High level min 3.5V Low level max:1.5 V, High level min 3.5V 1Vpp, Max:1.4Vpp 1Vpp, Max:1.4Vpp 8V, Min:7.2V, Max:8.8V 1Vpp, Max:1.4Vpp

: 700mVrms, Min:500mVrms, Max:900mVrms : Vpp, Max:1.4Vpp : Amplitude of low reference current Amplitude of high reference current : 2Vpp : 2Vpp : 2Vpp : : 8mA 20mA

19. Blue output 20. Green output 21. Red output 22. Beam current limiter input/V-guard input 23. Red input for insertion : 0.7Vpp, Max:0.8Vpp 24. Green input for insertion : 0.7Vpp, Max:0.8Vpp 25. Blue input for insertion : 0.7Vpp, Max:0.8Vpp 26. RGB insertion input : Max:0.3V 27. Luminance input : 1.4Vpp 28. Luminance output : 1.4Vpp 29. (B-Y) signal output : 1.05Vpp 30. (R-Y) signal output : 1.05Vpp 31. (B-Y) signal input : 1.05Vpp 32. (R-Y) signal input : 1.05Vpp 33. Subcarrier reference output : 3.58/4.43 MHz 34. 3.58 MHz crystal connection 35. 4.43/3.58 MHz crystal connection 36. Loop filter phase detector 37. 2nd supply voltage 1 : 8V, Min:7.2V, Max:8.8V 38. CVBS output : 1Vpp, Max:1.4Vpp 39. Decoupling digital supply : 1.8V 40. Horizontal output : Max: 0.3V 41. Flyback input/sandcastle output : Min:100ma, Max:300mA 42. Phase-2 filter : 150 ms/ms 43. Phase-1 filter : ±0.9 kHz, Max: ±1.2 kHz 44. Ground 2 45. East-west drive output 46. Vertical drive A output : 0.95mA 47. Vertical drive B output : 0.95mA 48. IF input 1 49. IF input 2 50. EHT/overvoltage protection input : Min:1.2V, Max : 2.8V 51. Vertical sawtooth capacitor : 3Vpp 52. Reference current input : 3Vpp 53. AGC decoupling capacitor 54. Tuner AGC output : Max:9V (Maximum tuner AGC 55. Audio deemphasis : 500mVrms 56. Decoupling sound demodulator 7

output voltage), 300mV (Output saturation voltage)

General description of PLL : The PLL tuner belongs to the UV 1300 family of tuners, which are designed to meet a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR systems B/G, H, L, L, I and I. The low IF output impedance has been designed for direct drive of a wide variety of SAW filters with sufficient suppression of triple transient. n n n n n n n Member of the UV1300 family small sized UHF/VHF tuners Systems CCIR: B/G, H, L, L, I and I; OIRT: D/K Digitally controlled (PLL) tuning via IżC-bus Off-air channels, S-cable channels and Hyperband World standardized mechanical dimensions and world standard pinning Compact size Complies to CENELEC EN55020 and EN55013 PIN VALUE : 4.0V, Max:4.5V : Max:5.5V : Min:-0.3V, Max:5.5V : Min:-0.3V, Max:5.5V : 5.0V, Min:4.75V, Max:5.5V : 33V, Min:30V, Max:35V

PINNING 1. Gain control voltage (AGC) 2. Tuning voltage 3. I²C-bus address select 4. I²C-bus serial clock 5. I²C-bus serial data 6. Not connected 7. PLL supply voltage 8. ADC input 9. Tuner supply voltage 10. Symmetrical IF output 1 11. Symmetrical IF output 2

TEA6415C:

General Description: The main function of the TEA6415C is to switch 8 video input sources on the 6 outputs. Each output can be switched to only one of the inputs whereas but any same input may be connected to several outputs. All switching possibilities are controlled through the IżC-bus. Features: n 20 MHz Bandwith n Cascadable with another TEA6415C (Internal address can be changed by pin 7 voltage) n 8 inputs (CVBS, RGB, Mac, CHROMA, ) n 6 Outputs n Possibility of MAC or chroma signal for each input by switching-off the clamp with an external resistor bridge n Bus controlled n 6.5dB gain between any input and output n -55dB crosstaljk at 5MHz n Fully ESD protected PINNING 1. Input 2. Data 3. Input 4. Clock 5. Input 6. Input 7. Prog 8. Input 9. Vcc 10. Input 11. Input 12. Ground 13. Output 14. Output 15. Output 16. Output 17. Output 18. Output 19. Ground 20. Input PIN VALUE : Max : Low level : Max : Low level : Max : Max : : : : : : : : : : Max 12V Max Max 5.5Vpp, 5.5Vpp, 5.5Vpp, 5.5Vpp, 5.5Vpp, 5.5Vpp, : 2Vpp, Input Current : -0.3V Max:1.5V, High level : 2Vpp, Input Current : -0.3V Max:1.5V, High level : 2Vpp, Input Current : 2Vpp, Input Current : 2Vpp, Input Current : 2Vpp, Input Current : 2Vpp, Input Current Min : 4.5Vpp Min : 4.5Vpp Min : 4.5Vpp Min : 4.5Vpp Min : 4.5Vpp Min : 4.5Vpp : 1mA, Max : 3mA : 1mA, : 3.0V : 1mA, : 3.0V : 1mA, : 1mA, Max Max Max Max Max Max : 3mA : Vcc+0.5V : 3mA : Vcc+0.5V : 3mA : 3mA : 3mA : 3mA : 3mA

: 1mA, Max : 1mA, Max : 1mA, Max

: Max : 2Vpp, Input Current

8

TDA2614/TDA2615 :

General Description of TDA2614: The TDA2614 is a power amplifier in a 9-lead single-in-line (SIL9) plastic medium power package. It has been especially designed for mains fed applications. Features: n Requires very few external components n No switch-on/switch-off clicks n Input mute during switch-on and switch-off n Low offset voltage between output and ground n Hi-fi in accordance with IEC 268 and DIN 45500 n Short-circuit proof and thermal protected n Mute possibility PINNING 1. Not connected 2. Mute input 3. Ground 4. Not connected 5. Supply voltage (negative) 6. Output 7. Supply voltage (positive) 8. Inverting input (Ground) 9. Non-inverting input PIN VALUE : 300mA (For mute to activate) : : : : : -12VDC 6.9Vrms +12VDC 0V 700mVrms, Min : 500mVrms, Max : 900mVrms

General Description of TDA2615: The TDA2615 is a dual power amplifier in a 9-lead single-in-line (SIL9). It has been especially designed for mains fed applications. Features: n Requires very few external components n No switch-on/switch-off clicks n Input mute during switch-on and switch-off n Low offset voltage between output and ground n Excellent gain balance of both amplifiers n Hi-fi in accordance with IEC 268 and DIN 45500 n Short-circuit proof and thermal protected n Mute possibility PINNING PIN VALUE 1. Non-inverting input 1 : 700mVrms, Min :500mVrms, Max : 900mVrms 2. Mute input : 300mA (For mute to activate) 3. Ground 4. Output 1 : 6.9Vrms 5. Supply voltage (negative) : -12VDC 6. Output 2 : 6.9Vrms 7. Supply voltage (positive) : +12VDC 8. Inverting inputs 1 and 2 (Ground) : 0V 9. Non-inverting input 2 : 700mVrms, Min : 500mVrms, Max : 900mVrms

TDA8356 :

General Description: The TDA8356 is a power circuit for use in 90ų colour deflection system for field frequencies of 50 to 120 Hz. The circuit operates as a highly efficient class G system. Features: n Few external components n Highly efficient fully DC-coupled vertical output bridge circuit n Vertical flyback switch n Guard circuit n Protection against: - short-circuit of the output pins (7 and 4) - short-circuit of the output pins to Vp n Temperature (thermal) protection n High EMC immunity because of common mode inputs n A guard signal in zoom mode PINNING 1. Input power-stage (positive); includes Ii(sb) signal bias : 2. Input power-stage (negative); includes Ii(sb) signal bias 3. Operating supply voltage : 4. Output voltage B : 5. Ground 6. Input flyback supply voltage : 7. Output voltage A : 8. Guard output voltage : 9. Input feedback voltage : PIN VALUE 400mA, Min : 50mA, Max : 500mA :400mA, Min : 50mA, Max : 500mA +15VDC Max : 52V Output current : 2App (TDA8356) 3App (TDA8351) Min : Vp, Max : 50V Max : 52V Output current : 2App (TDA8356) 3App (TDA8351) Max:5.5V (Io:100mA) Max:52V 9

TDA6107Q:

The TDA6107Q includes three video output amplifiers in a SIL 9 MP (Single In Line 9 pins Medium Power) package SOT111BE, using high-voltage DMOS technology, and is intended to drive the three cathodes of a colour picture tube. In contrast to previous types of DMOS video amplifiers, all external resistors (Rf, Ri and Ra) are integrated, so the gain is fixed and it saves 9 resistors. To obtain maximum performance, the amplifier should be used with black-current control and mounted on the CRT panel. Features: n Bandwith: 4.0 MHz typ at 100Vpp (Measured in appli,cation set-up, with Rfl=1K5 and Cl=Ctube+Cpcb=10pF) n Slewrate: 950V/ms n Fixed gain of 50 times n No external components, only the well known supply decoupling n Very simple application with a variety of colour decoders n Black-current measurement output for automatic black current stabilization n Only one supply voltage needed n Internal protection against positive appearing CRT flash-over discharges n Protection against ESD n Internal reference voltage n Thermal protection n Controllable switch-off behaviour n Very small PCB dimensions n Very high replacement value PINNING PIN VALUE 1. Inverting input 1 : 2Vpp 2. Inverting input 2 : 2Vpp 3. Inverting input 3 : 2Vpp 4. Ground 5. BSC-output : Max:7V 6. Supply voltage : 200VDC 7. Cathode output 3 : 20mA, 100Vpp 8. Cathode output 2 : 20mA, 100Vpp 9. Cathode output 1 : 20mA, 100Vpp

MC44604:

General description: The MC44604 is an enhanced high performance controller that is specifically designed for off-line and DC-to-DC converter applications. It offers a really safe and reliable power management thanks particularly to its protection features (foldback, overvoltage detection, soft start, accurate demagnetization detection). Its high current totem pole output is also ideally suited for driving a power MOSFET, but can also be used for driving a bipolar transistor in low power converters. In addition to these features, the MC44604 offers an efficient stand-by mode. Features: Current Mode Controller n Operation up to 250 kHz Output Switching Frequency n Inherent Feed Forward Compensation n Latching PWM for Cycle-by-Cycle Current Limiting n Oscillator with Precise Frequency Control High Flexibility n Externally Programmable Reference Current n Secondary or Primary Sensing n High Current Totem Pole Output n Undervoltage Lockout with Hysteresis Safety/Protection Features n Overvoltage Protection Facility against Open Loop n Protection against Short Circuit on Oscillator Pin n Fully Programmable Foldback n Soft-Start Feature n Accurate max Duty Cycle Setting n Demagnetization (Zero Current Detection) Protection n Internally Trimmed Reference Green Controller n Low Start-Up and Operating Current n Patented Stand-by Pulsed Mode for low stand-by losses n Low dV/dT for Low EMI radiations PINNING 1. Output Supply Voltage (Vcc) 2. Output Supply Voltage (Vc) 3. Output voltage PIN VALUE : 12VDC : 12VDC : LOW Level Drop Voltage 1VDC, 1.4VDC, HIGH Level Drop Voltage 1.5VDC, 2VDC,

4. Ground 5. Foldback input

Max : 1.2VDC (Isink=100mA) Max : 2VDC (Isink=500mA) Max : 2VDC (Isource=200mA) Max : 2.7VDC (Isource=500mA)

: 0.9VDC, Min:-0.3VDC, Max : Vcc+0.3VDC 10

6. Overvoltage protection (OVP) 7. Current sense input 8. Demagnetization detection input 9. Standby current set 10. Oscillator voltage swing 11. Soft start/Dmax/Voltage mode 12. Clamp E/A input 13. E/A output 14. E/A input 15. Stand-by management 16. Rref input

: : : : : : : : : :

0.78VDC, Min:-0.3VDC, Max : Vcc+0.3VDC Min:-0.3VDC, Max : Vcc+0.3VDC Idemag-ib (source):-4mA Idemag-ib (sink) : 10mA Ipeak-stby/Iref : 0.40 Min : 0.37 Max : 0.43 2Vpp Idischarge : 5mA, Min : 1.5mA (Vsoft start=1V) 4.7VDC, Min : 4.5VDC Max : 4.9VDC HIGH State: 6.5VDC, Min : 5.5VDC, Max : 7.5VDC LOW State : 1.0VDC, 1.1VDC 2.5VDC, Min : 2.4VDC, Max : 2.6VDC Stand-by On Detection current ratio : Idet/Iref : 0.38, Min : 0.34, Max : 0.42 Stand-by regulation current ratio : Ireg/Iref : 20.5, Min : 18, Max : 23 : 2.5VDC, Min : 2.4VDC, Max : 2.6VDC

SDA545X :

General description: The SDA545X is designed for a low cost mono TV-set with analogue picture and sound control. IN SDA545X the following IC s are used and supported: Non-volatile memory PLL IR transmitter IR preamplifier : SDA 2526 or SDA2546 : SDA 3202-3, SDA 3302 : SDA 2208-3 or SDA 2218 : SFH 506-32

Features: General: n Display of program number, channel number, TV standard, analogue values, sleep timer, parental control, and mute is done by OSD n Single LED for IR active, standby and on mode indication n Local control (8 keys) n IR remote control n Control of volume, contrast, brightness, and saturation by analogue voltages n Non-volatile memory for 50 or 100 programs, optimum analogue values and system parameters n Individual delta volume for each program n 1 control line to select external source n 3 control lines for TV standard selection n Automatic muting if no carrier detected n Automatic switch-off when carrier disappears for more than 5 minutes n Software protection against tube flashovers with internal watchdog timer n Sleep timer n Parental control n IF 38 MHz or 38.9 MHz selectable Tuning: n Frequency synthesis tuning (62.5 kHz steps) n 192 step fine tuning n Channels corresponding to standards n 100 programs selectable by directly entering a program number or by up/down function depending on the NVM size n Channel selection by directly entering a channel number or by up/down function n Channel search function in two directions Sound: n Mono sound control by analogue voltage Service Mode: n System configuration with service mode PINNING 1. Crystal selection output 1 2. Volume + switch input 3. Volume - switch input 4. Program - switch input 5. Program + switch input: 6. LED output 7. Filter (sound standard) selection output 1 8. Filter (sound standard) selection output 2 9. Mod-switch selection output 10. Ground 11. Supply voltage 12. 18 MHz crystal connection 1 13. 18 MHz crystal connection 2 PIN VALUE : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : +5V : 2Vpp : 2Vpp 11 : : : : : : : : : : : : : : : : : : 0V 4.2V 0V 5V 0V 5V 0V 5V 0V 5V 0V 4.2VDC 0V 4.2V 0V 4.2V 0V 4.2V

14. L-ACC output 15. RESET output 16. Comb filter PAL/SECAM selection output 17. Tuning output 18. Audio switch transistor selection 1 19. Audio switch transistor selection 2 20. Audio switch transistor selection 3 21. Audio switch transistor selection 4 22. Comb filter standard selection 1 23. Comb filter standard selection 2 24. Analogue ground 25. Filter 3 26. Filter 2 27. Filter 1 28. Analogue supply voltage 29. Reference current input 30. CVBS input 31. Service output 32. AV2-status input 33. AV1-status input 34. AFC output 35. Ground 36. IR-input 37. Supply voltage 38. LC input 39. LC output 40. Mute output 41. St-by output 42. Clock signal output 43. Data output 44. Local connection 45. SAND input 46. ODD/EVEN output 47. OSD-red output 48. OSD-green output 49. OSD-blue output 50. OSD-blanking output 51. COR output 52. Crystal selection output 2

: LOW level HIGH level LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level

: : : : : : : : : : : : : : : : : : : :

0V 3.6V 0V 5V 0V 5V 0V 3.4V 0V 5V 0V 5V 0V 5V 0V 5V 0V 5V 0V 5V

: 5VDC : 1Vpp : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : 600mVpp : LOW level HIGH level : 5V : 5Vpp : 5Vpp : LOW level HIGH level : LOW level HIGH level : LOW HIGH : 4Vpp : 1.8V : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : LOW level HIGH level : : : : : : 0V 5V 0V 5V 0V 5V

: 0V : 5V

: : : :

0V 4.2V 0V 1.4V

: 0V : 5V : : : : : : : : : : : : 0V 5V 0V 5V 0V 5V 0Vh 5V 0V 5V 0V 4.2V

ST24C08:
General description: The ST24C08 is a 8Kbit electrically erasable programmable memory (EEPROM), organized as 4 blocks of 256 * 8 bits. The memory operates with a power supply value as low as 2.5V. Both Plastic Dual-in-Line and Plastic Small Outline packages are available. Features: n Minimum 1 million ERASE/WRITE cycles with over 10 years data retention n Single supply voltage:4.5 to 5.5V n Two wire serial interface, fully IżC-bus compatible n Byte and Multibyte write (up to 8 bytes) n Page write (up to 16 bytes) n Byte, random and sequential read modes n Self timed programming cycle PINNING PIN VALUE 1. Write protect enable (Ground) : 0V 2. Not connected (Ground) : 0V 3. Chip enable input (Ground) : 0V 12

4. Ground 5. Serial data address input/output 6. Serial clock 7. Multibyte/Page write mode 8. Supply voltage

: 0V : Input LOW voltage : Min : -0.3V, Max : 0.3*Vcc Input HIGH voltage: Min : 0.7*Vcc, Max : Vcc+1 : Input LOW voltage : Min: -0.3V, Max : 0.3*Vcc Input HIGH voltage: Min : 0.7*Vcc, Max : Vcc+1 : Input LOW voltage : Min: -0.3V, Max :0.5V Input HIGH voltage: Min : Vcc-0.5, Max : Vcc+1 : Min : 2.5V, Max : 5.5V

TDA1308:
Features: n Wide temperature range n No switch ON/OFF clicks n Excellent power supply ripple rejection n Low power consumption n Short-circuit resistant n High performance - high signal-to-noise ratio - high slew rate - low distortion n Large output voltage swing PINNING 1. Output A (Voltage swing) 2. Inverting input A 3. Non-inverting input A 4. Ground 5. Non-inverting input B 6. Inverting input B 7. Output B (Voltage swing) 8. Positive supply :

: : : : : : :

PIN VALUE Min : 0.75V, Max : 4.25V Vo(clip) : Min : 1400mVrms 2.5V 0V 2.5V Vo(clip) : Min : 1400mVrms Min : 0.75V, Max : 4.25V

G1965M:

5V, Min : 3.0V, Max : 7.0V

Features: n TV IF filter with Nyquist slope and sound shelf at typ. 20.4dB n High colour carrier level at typ. 1.0dB n Constant group delay n Insertion attenuation typ. 15.0dB PINNING 1. Input 2. Input-ground 3. Chip carrier-ground

In order to enter the service menu, first enter the installation menu and then press the digits 4, 7, 2 and 5 respectively. For ADJUST settings: Select Adjust using or button and press To change the selected parameter, use or OPTION 00 B7: Ina B6: Inb B5: Inc B4: Akb B3: Foa B2: Fob B1: Xa B0: Xb note 1: Xa,Xb 0,1 : 1,0 : = = = = = = = = 0 0 0 0 0 0 note1 note1 or button to enter it. To select different adjust parameters, use button. or button.

AK25 CHASSIS MANUAL ADJUSTMENTS PROCEDURE

Pal M, Pal N, Ntsc M Pin 34 : 3.58 (1, 2 or 3 crystals) Pin 35 : No crystal Pal BG, Pal DK, Pal I/I+, Secam BG, Secam DK, Secam L/L, Secam K1 Pin 34 : No crystal Pin 35 : 4.43 (1 crystal)

1,1

:

Pin 34 : 3.58 (1, 2 or 3 crystals) Pin 35 : 4.43 (1 crystal)

Pal BG, Pal DK, Pal I/I+, Secam BG, Secam DK, Secam L/L, Secam K1, Pal M, Pal N, Ntsc M

13

OPTION 01 B7: Frf B6: Frs B5: Dl B4: Stb B3: Poc B2: Cm2 B1: Cm1 B0: Cm0 OPTION 02 B7: Oso B6: Vsd B5: Cb B4: Bls B3: Bks B2: Ie1 B1: Afw B0: Bb OPTION 03 B7: Hob B6: Bps B5: Acl B4: Cmb B3: Ast B2: Cl2 B1: Cl1 B0: Cl0 OPTION 04 B7: Ifs B6: Mod B5: Vsw B4: Sm B3: Ds B2: Dsa B1: Fav B0: Lfa OPTION 05 B7: Avl B6: Hbl B5: Vim B4: Gai B3: Nci B2: Stm B1: Vid B0: Lbm OPTION 06 B7: Hco B6: Evg B5: Sbl B4: Prd B3: Mat B2: Rbl B1: Cor B0: Aen note 1: 0 1 note 2: 0 1 = = = =

= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =

1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 1 1 1 note 1 1 1 note 2

If only PAL Else APS diasbled >> Preset APS enabled >> APS = = = = = = = = note 1 note 1 note 1 note 1 note 2 note 3 note 4 note 4

OPTION 07 B7: C3 B6: C2 B5: C1 B4: C0 B3: CL B2: Tr B1: L1 B0: L0

14

note 1: C3,C2,C1,C0 0,0,0,0 0,0,0,1 0,0,1,0 0,0,1,1 0,1,0,0 0,1,0,1 0,1,1,0 0,1,1,1 1,0,0,0 1,0,0,1 1,0,1,0 1,0,1,1 1,1,0,0 1,1,0,1 1,1,1,0 1,1,1,1 note 2: CL 0 1 note 3: Tr 0 1 note 4: L1,L0 0,0 0,1 1,0 1,1 = = = = = = = = = = =

= = = = = = = = = = = = = = = = =

Country ? D A CH I F B DK S N SF GB NL P E TR

Not allowed Germany Austria Switzerland Italy France Belgium Denmark Sweden Norway Finland Great Britain Netherlands Portugal Spain Turkey

Child Lock Off On (Active) Turkish Language Disabled (3 Languages : German, English, Italian) Enabled (4 Languages : German, English, Italian, Turkish) Language German English Italian Turkish = = = = = = = = note 1 note 2 note 3 note 4 note 5 note 6 note 7 note 8

OPTION 08 B7: Tub B6: Z.Def B5: IfD B4: IfI B3: IfM B2: Aps B1: Hp B0: Hue note 1: Tub 0 1 note 2: Z.Def 0 1 note 3: IfD 0 1 note 4: IfI 0 1 note 5: IfM 0 1 Note 6: Aps 0 1 note 7: Hp 0 1 note 8: Hue 0 1

= = = = = = = = = = = = = = = =

16:9 Tube size 4:3 Tube size 16:9 mode default 4:3 mode default IF DK 38.0 MHz IF DK 38.9 MHz IF I 39.5 MHz IF I 38.9 MHz Great Britain I Ireland I+ , Only UHF Tuner , Standard Tuner

IF M,N 45.75 MHz S&N American Models , Tuner UV1336 (Only Pal M/N, Ntsc M) IF M,N 38.9 MHz Euro M,N Models , Standard Tuner A.P.S. done A.P.S. set No headphone Headphone available No hue Hue available

15

OPTION 09 B7: NM B6: PN B5: PM B4: K1 B3: L B2: I B1: DK B0: BG note 1: 0 = 1 = OPTION 10 B7: Cine B6: WEu B5: E/T B4: Com B3: Svh B2: Fro B1: Sc2 B0: Sc1

= = = = = = = =

note 1 note 1 note 1 note 1 note 1 note 1 note 1 note 1

Standard not supported Standard available = = = = = = = = note 1 note 2 note 2 0 0 note 3 note 4 note 5

note 1: 0 = Cinema Mode Not Supported 1 = Cinema Mode Enable note 2: Weu,E/T Teletext character set table selection 0,0 = West Europe + Turkish 0,1 = East Europe 1,0 = West Europe 1,1 = West Europe note 3: 0 = Front AV (AV-3) not supported 1 = Front AV (AV-3) available note 4: 0 = Scart 2 not supported 1 = Scart 2 available note 5: 0 = Scart 1 not supported 1 = Scart 1 available OPTION 11 B7: b7 B6: b6 B5: b5 B4: b4 B3: b3 B2: b2 B1: b1 B0: b0 = = = = = = = = note 1 note 1 note 1 note 1 note 1 note 1 note 1 note 1

note 1 : Pll tuner control 1 byte Philips Alps Samsung Siel Temic Thomson OPTION 12 B7: b7 B6: b6 B5: b5 B4: b4 B3: b3 B2: b2 B1: b1 B0: b0 UV1316MK2 TELE9X062A TEXX2949PG28A PT060 5001PH5-3X0003 CTT5020 = = = = = = = = note 1 note 1 note 1 note 1 note 1 note 1 note 1 note 1

b7 b6 b5 b4 b3 b2 b1 b0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0

16

note 1 : Pll tuner control 2 low byte Philips Alps Samsung Siel Temic Thomson OPTION 13 B7: b7 B6: b6 B5: b5 B4: b4 B3: b3 B2: b2 B1: b1 B0: b0 UV1316MK2 TELE9X062A TEXX2949PG28A PT060 5001PH5-3X0003 CTT5020 = = = = = = = = note 1 note 1 note 1 note 1 note 1 note 1 note 1 note 1

b7 b6 b5 b4 b3 b2 b1 b0 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 1

note 1 : Pll tuner control 2 mid byte Philips Alps Samsung Siel Temic Thomson OPTION 14 B7: b7 B6: b6 B5: b5 B4: b4 B3: b3 B2: b2 B1: b1 B0: b0 UV1316MK2 TELE9X062A TEXX2949PG28A PT060 5001PH5-3X0003 CTT5020 = = = = = = = = note note note note note note note note 1 1 1 1 1 1 1 1

b7 1 0 0 1 0 0

b6 0 0 0 1 0 0

b5 b4 b3 b2 b1 b0 0 1 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 1 1 0

note 1 : Pll tuner control 2 high byte Philips Alps Samsung Siel Temic Thomson OPTION 15 B7: b7 B6: b6 B5: b5 B4: b4 B3: b3 B2: b2 B1: b1 B0: b0 UV1316MK2 TELE9X062A TEXX2949PG28A PT060 5001PH5-3X0003 CTT5020 = = = = = = = = note note note note note note note note 1 1 1 1 1 1 1 1

b7 0 0 0 0 0 1

b6 0 0 0 0 0 0

b5 b4 b3 b2 b1 b0 1 1 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1

note 1 : Pll tuner VHF LOW - VHF HIGH crossover low byte b7 b6 b5 b4 b3 b2 b1 b0 Philips UV1316MK2 0 0 0 0 1 0 1 0 (0A hex) Alps TELE9X062A 0 0 0 0 0 0 0 0 Samsung TEXX2949PG28A 0 0 0 0 1 0 1 0 Siel PT060 0 0 0 0 1 0 1 0 Temic 5001PH5-3X0003 0 0 0 0 0 0 0 0 Thomson CTT5020 1 0 1 0 1 0 1 0 (AA hex)

17

OPTION 16 B7: b7 B6: b6 B5: b5 B4: b4 B3: b3 B2: b2 B1: b1 B0: b0

= = = = = = = =

note note note note note note note note

1 1 1 1 1 1 1 1

note 1 : Pll tuner VHF LOW - VHF HIGH crossover high byte b7 b6 b5 b4 b3 b2 b1 b0 Philips UV1316MK2 0 0 0 0 1 1 0 0 (0C hex) Alps TELE9X062A 0 0 0 0 0 0 0 0 Samsung TEXX2949PG28A 0 0 0 0 1 1 0 1 Siel PT060 0 0 0 0 1 1 0 1 Temic 5001PH5-3X0003 0 0 0 0 0 0 0 0 Thomson CTT5020 0 0 0 0 1 0 0 1 (09 hex) OPTION 17 B7: b7 B6: b6 B5: b5 B4: b4 B3: b3 B2: b2 B1: b1 B0: b0 = = = = = = = = note note note note note note note note 1 1 1 1 1 1 1 1

note 1 : Pll tuner VHF HIGH - UHF crossover low byte b7 Philips UV1316MK2 1 Alps TELE9X062A 0 Samsung TEXX2949PG28A 1 Siel PT060 1 Temic 5001PH5-3X0003 Thomson CTT5020 1 OPTION 18 B7: b7 B6: b6 B5: b5 B4: b4 B3: b3 B2: b2 B1: b1 B0: b0 = = = = = = = = note note note note note note note note 1 1 1 1 1 1 1 1

b6 1 0 0 0

b4 b3 b2 b1 b0 0 0 0 1 0 (E2 hex) 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 (A2 hex)

b5 1 0 1 1

note 1 : Pll tuner VHF HIGH - UHF crossover high byte b7 Philips UV1316MK2 0 Alps TELE9X062A 0 Samsung TEXX2949PG28A 0 Siel PT060 0 Temic 5001PH5-3X0003 Thomson CTT5020 0 OPTION 19 B7: b7 B6: b6 B5: b5 B4: b4 B3: b3 B2: b2 B1: b1 B0: b0 = = = = = = = = note note note note note note note note 1 1 1 1 1 1 1 1

b6 0 0 0 0

b4 b3 b2 b1 b0 1 1 1 1 0 (1D hex) 0 0 0 0 0 1 1 1 1 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 (1B hex)

b5 0 0 0 0

note 1 : ? b6Nicam On=1, Nicam Off=0

SCART PRESCALE

b7 b6 b5 b4 b3 b2 b1 b0

0 ? 0 0 1 1 1 1

(AVL On)

18

OPTION 20 B7: b7 B6: b6 B5: b5 B4: b4 B3: b3 B2: b2 B1: b1 B0: b0 note 1 :

= = = = = = = =

note note note note note note note note

1 1 1 1 1 1 1 1 b7 b6 b5 b4 b3 b2 b1 b0 0 0 1 1 1 1 1 1 (AVL On)

NICAM PRESCALE OPTION 21 B7: b7 B6: b6 B5: b5 B4: b4 B3: b3 B2: b2 B1: b1 B0: b0 note 1 : FM PRESCALE OPTION 22 B7: b7 B6: b6 B5: b5 B4: b4 B3: b3 B2: b2 B1: b1 B0: b0 = = = = = = = = note note note note note note note note 1 1 1 1 1 1 1 1 = = = = = = = = note note note note note note note note 1 1 1 1 1 1 1 1

b7 b6 b5 b4 b3 b2 b1 b0 0 0 0 0 1 0 0 0 (AVL On)

note 1 : Dual Identification Limit related to reading DFP Register 0018h Stereo Detection Register of MSP 34xxD in German dual transmissions. b7 b6 b5 b4 b3 b2 b1 b0 DUAL LIMIT 0 0 0 1 0 0 1 0 (AVL On and Off) OPTION 23 B7: b7 = B6: b6 = B5: b5 = B4: b4 = B3: b3 = B2: b2 = B1: b1 = B0: b0 = note 1 : Stereo Identification Limit Transmissions. STEREO LIMIT note note note note note note note note 1 1 1 1 1 1 1 1

related to reading DFP Register 0018h Stereo Detection Register of MSP34xxD in German Stereo b7 b6 b5 b4 b3 b2 b1 b0 1 1 1 1 0 0 0 0 (AVL ON and Off)

OPTION 24 B7: b7 = note 1 B6: b6 = note 1 B5: b5 = note 1 B4: b4 = note 1 B3: b3 = note 1 B2: b2 = note 1 B1: b1 = note 1 B0: b0 = note 1 ote 1 : Auto FM_AM : FP Register 21h Automatic switching with external threshold B2, B1, B0 : Bit10, Bit9,Bit8 of the register B7, B6, B5, B4,B3 : Bit7,Bit6, Bit5, Bit4, Bit3 of the register (Bit2,Bit1 of the register is always 0 and Bit0 of the register is always 1.) AUTO SWITCH THRESHOLD b7 b6 b5 b4 b3 b2 b1 b0 0 1 0 0 0 0 1 1 19 (AVL On and off, Threshold 800)

OPTION 25 B7: b7 = note 1 B6: b6 = note 1 B5: b5 = note 1 B4: b4 = note 1 B3: b3 = note 1 B2: b2 = note 1 B1: b1 = note 1 B0: b0 = note 1 note 1 : Write to any of the DFP Registers when the power is on: If this byte or option is zero, you do not use this option. If you input a number to this option, you write the following bytes to the register addressed by that number. DFP ADDRESS b7 b6 b5 b4 b3 b2 b1 b0 0 0 0 0 0 0 0 0 (Under normal conditions)

OPTION 26 B7: b7 = note 1 B6: b6 = note 1 B5: b5 = note 1 B4: b4 = note 1 B3: b3 = note 1 B2: b2 = note 1 B1: b1 = note 1 B0: b0 = note 1 note 1 : If option 25 is set to zero, this option is not available. If option 25 is nonzero, DATA HIGH gives the high byte to be written to the register that is addressed by Option 25. b7 b6 b5 b4 b3 b2 b1 b0 DATA HIGH 0 0 0 0 0 0 0 0 OPTION 27 B7: b7 = note 1 B6: b6 = note 1 B5: b5 = note 1 B4: b4 = note 1 B3: b3 = note 1 B2: b2 = note 1 B1: b1 = note 1 B0: b0 = note 1 note 1 : If option 25 is set to zero, this option is not available. If option 25 is nonzero, DATA LOW gives the low byte to be written to the register that is addressed by Option 25. b7 b6 b5 b4 b3 b2 b1 b0 DATA LOW 0 0 0 0 0 0 0 0 OPTION 28 B7: b7 B6: b6 B5: b5 B4: b4 B3: b3 B2: b2 B1: b1 B0: b0 note 1 : = = = = = = = = note note note note note note note note 1 1 1 1 1 1 1 1 b7 b6 b5 b4 b3 b2 b1 b0 0 0 0 0 1 0 1 1 note note note note n