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Mother board, main board pcb info and schematics

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File name:Capell Valley laptop schematic diagram (Yonah-Calistoga Mobile platform).rar
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Descr:Capell Valley laptop schematic diagram (Yonah-Calistoga Mobile platform)
Group:Electronics > Computer equipment > Motherboards
Uploaded:26-02-2010
User:GUI0
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File name Capell Valley laptop schematic diagram (Yonah-Calistoga Mobile platform).pdf

5 4 3 2 1 Capell Valley D YONAH-CALISTOGA CUSTOMER REFERENCE BOARD Fan Header PG 5 Clocking Yonah 478 uFCPGA PG 3,4 FSB PG 30,31 IMVP-6 VR PG 51, 52 LVDS/ALS/BLI SODIMM0 PG 19 CRT (DVI-I) PG 18 VGA LVDS CPU Thermal Sensor XDP PG 37 PG 5 TVOUT PG 20 Calistoga 1466 FCBGA PG 6,7,8,9,10,11,12 PG 21,22,23 C PEG/ SDVO SDVO PG 13 X4 DMI interface SATA CC PG 43 SATA DC PG 44 SATA PORT 0 33 Mhz PCI ICH7M SATA PORT 2 PATA B PG 39 BACK PANEL FPIO/DB BACK PANEL FPIO/DB 2.0 USB7 2.0 USB6 2.0 USB5 2.0 USB4 8 USB ports total DOCKING BACK PANEL 2.0 USB0 2.0 USB1 BACK PANEL USB PG 40 A 5 . w w w 2.0 USB2 2.0 USB3 FPIO/DB USB FPIO/DB BACK PANEL HD AUDIO / MDC 1.5 HEADER PG 27 PG 29 t p la USB 2.0 4 HD AUDIO/ AC97 p o PG 14-17 652 BGA -s SPI LPC, 33MHz PCIEx1 PCIEx1 PCIEx1 h c TPM PG 35 m e PG 28 a SODIMM1 Dual Channel DDR2 m o .c s ic t PG 25 Fab 5 REV 1.502 IPN: C75289-501 Calistoga VCCP VR PG 48 D DDR VR PG 46 SYSTEM VR PG 49 SLEEP CONTROL PG 55 C PCI SLOT3 PG 25 PCI SLOT4 PG 26 BATTERY CHARGER VR PG 50 PCI EDGE-CONN PG 28 PCIe SLOT0 PG 28 PCIe SLOT2 PCIe SLOT1 MOBILE POWER ON SEQUENCE PCIEx1 PCIEx1 PCIEx1 B PCIE DOCKING Tekoa/EkronR LAN PORT 80-83 PG 41 PG 33, 34 RJ45 SIO PG 42 IR/ SERIAL PG 45 SPI Flash PG 33 SMC/KSC FWH 8 Mbit PG 24 PG 32 LPC SLOT PG 35 Capell Valley LPC DOCK Title PG 57 Intel Confidential A TITLE PAGE Size A Document Number D15378 Wednesday, July 20, 2005 2 Rev 1.501 Sheet 1 1 EMA PG 36 SCN KB/ PS2 PG 38 3 Date: of 60 5 4 3 2 1 CALISTOGA CUSTOMER REFERENCE PLATFORM SCHEMATIC ANNOTATIONS AND BOARD INFORMATION D Default Jumper Settings For Stuffed Jumpers I C / SMB Addresses Voltage Rails POWER PLANE +VBATA +VBAT +VBATS +V12S -V12A -V12S +V5A +V5 +V5S +V3.3A +V3.3 +V3.3S +V1.5S +V1.8 +V0.9 +V2.5S +V2.5_LAN +V1.2 +1.05S +VCC_CORE VOLTAGE 9V-12.5V 9V-12.5V 9V-12.5V 12V -12V -12V 5V 5V 5V 3.3V 3.3V 3.3V 1.5V 1.8V 0.9V 2.5V 2.5V 1.2V 1.05V 0.700V-1.77V S3COLD ACTIVE S0, S3, S4, S5 S0, S3, S4, S5 S0 S0 S0, S3,S4,S5 S0 S0, S3,S4,S5 S0, S3 S0 S0, S3,S4,S5 S0, S3 S0 S0 S0, S3 S0, S3 S0 S0, S3 S0, S3 S0 S0 DESCRIPTION Battery Rail in Mobile Power Mode Battery Rail in Mobile Power Mode Battery Rail in Mobile Power Mode Only on in DT Power Mode Only on in DT Power Mode Only on in DT Power Mode Address Device 1101 001x Clock Generator Spread Spectrum Clock 1101 010x PCI Express Clock 1101 110x 1010 010x SO-DIMM0 SO-DIMM1 1010 000x DDR Thermal Sensor 0100 1100 IC2 Buss Expander 0011 xxxx Ambient Light Sensor 0111 0010 Always ON Display 011 110x Thermal Diode 1001 100B Battery A 0001 0110 Battery B 11110 1100 1000 LAN TBD PCI Express Docking Trusted Platform Module TBD Hex D2/D3* D4/D5* DC/DD* A4 A0 4C 3x 72 3C 4C 16 1E 1E TBD TBD AON_ALS SMB_ICH SMB_THRM SMB_BS SMB_BS SMB_BS SMB_ICH_A1 Bus SMB_ICH_S3 SMB_ICH_S3 SMB_ICH_S3 SMB_ICH_S2 SMB_ICH_S2 SMB_ICH_S2 2 Jumper Default Description DDR core DDR command & control pull up. LAN Rail LAN Rail GMCH, ICH core, a



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