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File name:4515.pdf
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Mfg:ST
Model:4515 🔎
Original:CMOS 4xxx 🔎
Descr:4 TO 16 LINE DECODER/LATCH (INV.)
Group:Electronics > Components > Integrated circuits
Uploaded:20-05-2005
User:dupator
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File name 4515.pdf

M74HC4515 4 TO 16 LINE DECODER/LATCH (INV.) s s s s s s s HIGH SPEED: tPD= 20 ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4515 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC4515B1R M74HC4515M1R T&R M74HC4515RM13TR M74HC4515TTR DESCRIPTION The M74HC4515 is an high speed CMOS 4 LINE TO 16 LINE SEGMENT DECODER WITH LATCHED INPUTS fabricated with silicon gate C2MOS technology. A binary code stored in the four input latches (A to D) provides a low level at the selected one of sixteen outputs excluding the other fifteen outputs, when the inhibit input (INHIBIT) is held low. When the inhibit input(INHIBIT) is held high, all outputs are kept high level, while the latch function is available. The data applied to the data inputs are transferred to the Q outputs of latches when the strobe input is held high. When the strobe input is taken low, the information data applied to the data input at a time is retained at the output of the latches. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS April 2003 1/12 M74HC4515 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2, 3, 21, 22 11, 9, 10, 8, 7, 6, 5, 4, 18, 17, 20, 19, 14, 13, 16, 15 23 12 24 SYMBOL STROBE A to D S0 to S15 NAME AND FUNCTION Strobe Input Address Inputs Multiplexer Outputs (Active HIGH) INHIBIT GND VCC Enable Input Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS STROBE INHIBIT L L L L L L L L L L L L L L L L H X : Don't Care SELECT OUTPUT S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 ALL OUTPUTS "H" A L H L H L H L H L H L H L H L H X B L L H H L L H H L L H H L L H H X C L L L L H H H H L L L L H H H H X D L L L L L L L L H H H H H H H H X STROBE = "H" Refer to truth table STROBE = "L" Data at the negative going transition of strobe shall be provided on the each output while strobe is held low. 2/12 M74HC4515 LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO PD Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Power Dissipation Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 25 ± 50 500(*) -65 to +150 300 Unit V V V mA mA mA mA mW °C °C ICC or IGND DC VCC or Ground Current Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/ °C from 65°C to 85°C 3/12 M74HC4515 RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO To

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